搜索资源列表
luojidianlu
- 一些复杂逻辑电路的设计，状态机的verilog的程序语言-The design of complex logic circuits, the state machine of the verilog programming language
FSM
- 关于状态机的规范编码风格，有具体的verilog，vhdl实例-On the norms of the state machine coding style, specific Verilog, VHDL instance
lcd1602
- 本代码在FPGA上使用Verilog编程语言实现LCD1602驱动（使用状态机）-This code using Verilog programming language achieved LCD1602 driver (using the state machine) on the FPGA
seg7x6
- 本代码使用Verilog语言编写的带状态机的数码管驱动并在FPGA上得到验证！-This code uses the Verilog language with digital tube-driven state machine to be verified on the FPGA!
key_scan
- 本代码使用Verilog语言实现了矩阵键盘的驱动（含状态机）-This code uses the Verilog language matrix keyboard driver (including the state machine)
ttraafficLighr
- <p>交通灯状态机的实现，用verilog HDL编程与开发，Xillinx ISE 6仿真，在实际电路中的到验证． 已通过测试。</p> -<p> The implementation of the traffic light state machine, using verilog HDL programming and development, Xillinx ISE 6 simulation, to verify the actual circui
demo110
- 状态机，检测状态110，小演示程序，可直接运行，verilog hdl-State machine, the detection state 110, a small demo program can be run directly, verilog hdl
state
- 状态机程序，具有简易功能的自动贩卖机verilog hdl-Program of the state machine, vending machine with a simple function verilog hdl
state-machine-program
- Verilog三段式状态机.pdf Verilog时序电路及状态机设计.ppt Verilog有限状态机设计.ppt 状态机.ppt 用状态机原理进行软件设计.pdf 有限状态机.pdf 有限状态机.ppt 状态机原理及用法.pdf 对状态机初学者有帮助。 -Verilog three-state machine the pdf Verilog Sequential Circuits and the state machine design. Ppt Veri
keypad
- 使用Verilog编写的实现FPGA键盘功能，使用了状态机-The use of FPGA in Verilog keyboard function, using the state machine
v16bbit_boothe
- verilog程序源码，实现两个16bit数乘法，使用booth算法，一种基于状态机实现，分层层次为datapath与controller两个子模块，testBench测试通过 -verilog program source code, and two 16bit multiplication using booth algorithm, based on the state machine implementation, the hierarchical level for the da
dianji
- 用VERILOG HDL编写的通过状态机控制步进电机的例程，很经典-VERILOG HDL prepared by the state machine to control the stepper motor routines, classic
paomadeng2
- 简单的跑马灯verilog程序，笔者是初学者，利用简单状态机编写的-Simple Marquee verilog program, the author is a beginner, use a simple state machine to write
AD9854verilog
- verilog 编写的AD9854配置代码 通过状态机转换来配置AD9854-CONGIURE the ad9854 dds
FSM
- 典型实例用FPGA来实现有限 状态机 FSM的程序编写-fpga fsm verilog
ddr_verilog
- DDR控制器的VERILOG代码；状态机；读写；刷新等操作-ddr controller,verilog
fVerrilog_Devr
- 朋友，我是Jawen.看到先前上载的一套CPLD开发板的VHDL源码挺受欢迎的，现在就将她的Verilog源码也一并贡献给大家：8位优先编码器，乘法器，多路选择器，二进制转BBCD码，加法器，减法器，简简单易懂状态机，四位比较器，7段数码管，i2c总线，lcd液晶LCD显示出来，拨码开关，串口，蜂鸣器，矩阵键盘，跑马灯，交通灯，数字时钟 可直接使用。 -Friends, I Jawen. See previous upload a CPLD Development Board VHDL so
Traffic
- 交通灯控制器的Verilog代码，采用了三段式的状态机描述，适合学习和练习，包括了验证代码-A Verilog code of Traffic light controller, using a three-stage state machine descr iption suitable for learning and practice, including the verification code
a-simple-state-machine
- 简易状态机 verilog实现的简单状态机，全工程不错的 典型历程 值得学习入门很好的实验例程-Simple state machine verilog achieve a simple state machine, the typical course of the whole works good deserves learning entry good experimental routines
verilog_iic_at24c04
- verilog语言实现的iic协议通信，一段式状态机实现，结合按键和数码管，用来控制和显示数据-Verilog language the iic protocol communication, for some state machine implementation, buttons and digital tube, used to control and display data.